More About Me

Education

Old Dominion University

August 2022 - May 2026

  • Bachelor of Science in Computer Engineering
  • Minor in Computer Science
  • GPA: 3.97

Honors and Awards:

  • Batten College of Engineering and Technology Dean's List from Fall 2023 - Spring 2026
  • Department of Electrical and Computer Engineering's Undergraduate Faculty Award in Computer Engineering for Spring 2026
  • Member of Tau Beta Pi engineering honor society

Projects

Skeleton Re-ID on Raspberry Pi

August 2025 - May 2026

  • Trained a lightweight convolutional neural network to identify humans from 3D skeleton data captured by an RGB-D camera, achieving 75% recognition accuracy during live testing.
  • Deployed the trained network on an inexpensive Raspberry Pi 4 microcomputer that consumes under 10 W.
  • Implemented an asynchronous client-server pipeline that kept total identification latency below 100 ms.
  • Built a Qt5 UI to visualize real-time skeletons at 30 FPS and display identification results.
  • Developed an integrated recording and training pipeline to allow seamless dataset expansion.
  • Authored detailed documentation that enabled our project mentor to independently recreate our results.

SVM Document Classifier

August 2025 - December 2025

  • Collaborated in an Agile-based team environment by attending stand-ups, writing user stories, practicing TDD, and drafting a software requirements specification.
  • Trained an SVM classifier to categorize documents using TF-IDF features, achieving 70% average accuracy.
  • Built a Java CLI application to parse PDFs, extract text, and display predicted categories.
  • Implemented CI/CD with GitHub Actions, build management with Gradle, and unit testing with JUnit.

MIPS Single-cycle Processor

August 2025 - December 2025

  • Designed a MIPS-based single-cycle processor in VHDL that supports 7 instructions, 8 registers, and 512 bytes each of data and instruction memory.
  • Constructed an ALU that supports addition, subtraction, multiplication, and value pass-through.
  • Developed a data path by hand, including PC, registers, ALU, instruction and data memories, and control unit.
  • Built VHDL testbenches to verify the data path’s correctness, including edge cases like value overflow.

Other

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